Various tuner circuits have been implemented in providing tuning with respect to radio frequency (RF) signals for a number of years. For example, single conversion tuners (tuners directly converting a transmitted RF signal to a baseband frequency) and multiple conversion tuners (tuners converting a transmitted RF signal to a baseband frequency in one or more stages, using an intermediate frequency (IF) at each stage) are in widespread use today. Such tuners are used in television sets and cable set top boxes to provide tuning to a desired television channel for viewing. Similarly, tuners are used in cable modems to provide tuning to a selected broadband data carrier channel. Examples of multiple conversion tuners implemented in a highly integrated circuit configuration are shown and described in the above referenced patent applications entitled “Broadband Integrated Tuner.”
For example, it is not uncommon to utilize a dual conversion tuner, having a up-converter (mixer providing conversion of an RF input signal to a first intermediate frequency (IF)) and a down-converter (mixer providing conversion of the first IF to a second IF or a baseband signal), in a cable television set-top box to provide tuning with respect to a single cable television channel from a broadband cable signal including one hundred or more cable television channels. Representative prior art dual conversion tuner 100 is shown in FIG. 1, wherein the input signal (FIN) is a RF signal which is converted to a particular desired frequency (FOUT), e.g., baseband frequency, for further signal processing.
Tuner 100 comprises mixers 111 and 112, here an up-converter and down-converter respectively. The source signal, as imposed on carrier frequency FIN, is injected into mixer 111 for up-conversion to a first IF, denoted here as FIF1. Accordingly, mixer 111 is driven by frequency source 101, here a local oscillator (LO) providing LO frequency FLO1. Similarly, the source signal, as imposed on carrier frequency FIF1, is injected into mixer 112 for down-conversion to a second IF, denoted here as FIF2. Accordingly, mixer 112 is driven by frequency source 102, here a LO providing LO frequency FLO2. It should be appreciated that in this example of tuner 100 the baseband FOUT, is FIF2.
In operation of tuner 100, the signal input to mixer 111 (FIN) is combined with the LO signal (FLO1) to produce a frequency translated signal (FIF1) corresponding to the sum (FLO1+FIN) and difference (FLO1−FIN) of the input signals. Likewise, the signal input to mixer 112 (FIF1) is combined with the LO signal (FLO2) to produce a frequency translated signals (FIF2) corresponding to the sum (FLO2+FIF1) and difference (FLO2−FIF1) of the input signals. Filters are typically implemented to remove one of the mixer signals. For example, first IF filter 120 may be utilized to remove the sum component output from mixer 111, such that the first IF signal comprises the difference component (FIF1=FLO1−FIN) and thus provides a subtractive mixer configuration. Similarly, a second IF filter (not shown) may be utilized to remove the sum component output from mixer 112, such that the second IF signal comprises the difference component (FOUT=FLO2−FIF2) and thus provides a second subtractive mixer configuration.
It should be appreciated that the signals output from mixers 111 and 112 (i.e., FIF1 and FIF2) include all signals input into the mixer, and are not limited to a particular signal of interest. Moreover, signals appearing at an image frequency (e.g., FLO2+FIF2 is an image frequency for mixer 112 where mixer 112 is used in a subtractive mixer configuration) will be frequency translated into the output band of interest for a mixer (e.g., FIF2 for mixer 112) if present at the input to the mixer, thus interfering with a source signal. Accordingly, in order to accommodate a broadband signal and provide a desired level of isolation with respect to a particular signal therein, various filters may be implemented with respect to a dual conversion tuner. For example, a common technique is to utilize the aforementioned first IF filter 120, disposed in the signal path between the up-converter (mixer 111) and the down-converter (mixer 112), in an attempt to pass substantially only a desired signal bandwidth to the second mixer. For example, first IF filter 120 may be utilized not only to filter the aforementioned sum component, but also to remove image frequencies, spurious signals, other signal channels, etc.
Accordingly, it would typically be desired that first IF filter 120 have a precise (low tolerance) center frequency and provides a high quality (Q) factor filter (providing sharp cutoff characteristics) having a very narrow bandwidth. The tolerance of such a first IF filter should typically be very low (the center frequency must be very close to a selected frequency) in order to avoid substantial attenuation of a desired signal associated with the sharp cutoffs of the pass band.
An exemplary filter configuration as may be implemented as first IF filter 120 in the prior art is shown in FIG. 2. Inductor L1 and capacitors C1 and C2 of FIG. 2 provide an LC passive filter network having a frequency response as illustrated by the frequency response curve of FIG. 3, wherein the horizontal axis represents frequency and the vertical axis represents impedance. Specifically, the illustrated filter circuit 2 provides a center frequency of
  1                    L        1            ⁢              C        1            at peak 301 and a zero at frequency
  1                    L        1            ⁡              (                              C            1                    +                      C            2                          )            at valley 302.
Mixer 111 of this example comprises a transconductance mixer, and therefore operates as a current source to first IF filter 120. Thus the impedance of first IF filter 120, as shown along the impedance (vertical) axis in the filter response curve of FIG. 3, is directly correlated to the frequency response output of the filter. Resistor R* of FIG. 2 represents the impedance associated with the non-ideal filter components L1, C1, and C2, and thus represents the impedance of the illustrated filter circuitry. As can be seen by the frequency response curve of FIG. 3, the filter circuitry of FIG. 2 provides a generally acceptable filter configuration, wherein a center frequency may be precisely established and which exhibits a relatively high Q factor.
However, the circuitry of mixer 111 providing transconductance mixer operation typically requires a direct current (DC) bias. The filter circuit capacitors, C1 and C2, provide low frequency blocking or a zero, which essentially provides DC blocking between the input (IN) of first IF filter 120 and VCC in the example of FIG. 2. This DC blocking prevents the aforementioned DC bias. Accordingly, an inductor, such as radio frequency choke (RFC) shown in FIG. 2, is often utilized to provide a DC biasing path. Although it is desirable to have a very high inductance RFC, such a configuration is not always possible. For example, high inductance inductors require appreciable size, such as may require a larger than acceptable portion of an integrated circuit. Moreover, as with the non-ideal filter components discussed above, the RFC is itself non-ideal. Accordingly, capacitor CPAR is shown in parallel with RFC to represent the parasitic capacitance introduced by this DC biasing component.
The use of the foregoing DC biasing inductor alters the frequency response of first IF filter 120 shown in FIG. 2. In particular, an appreciable passband having a center frequency of
  1            RFC      ⁡              (                              C            PAR                    +                      C            2                          )            at peak 303 is introduced by the DC biasing circuit. As can be appreciated by the frequency response curve of FIG. 3, peak 303 is disposed at a frequency relatively near the center frequency of the filter circuit, and is thus likely to allow unwanted signals such as image frequencies and spurious frequencies to interfere with a source signal of interest. The impedance (1/CPAR) of the DC biasing circuit, and thus the frequency response output of the filter associated with the DC biasing circuit, can be quite significant (e.g., compare peak 301 and 303). Moreover, the impedance of the DC biasing circuit is in parallel with the impedance of the filter circuit, thereby reducing the impedance of the LC filter circuit. Accordingly, the performance (e.g., image rejection, bandwidth, etc.) of first IF filter 120 is adversely affected by the DC biasing circuit.